Primary duties include supporting and trouble shooting data warehouse feed process or ETL

Leading a performance task force to improve extract process, network settings for transfer and best practices for loads in various database platforms as well as reporting through Crystal

Developed timing analysis tool for performance monitoring, task controller, and XML parser for ETL configurations

Carried on research in high performance computer architecture with a view to current CMOS scaling trends. Studied and implemented a variable depth pipeline for variable MHz processors for energy savings up to 44%. Published a paper on the obtained results (See below)

Simulated Communication system in MATLAB, designed and implemented the ˝ and 1/3 Convolutional CODEC using VHDL on an FPGA based system, implementing unique word detection synchronization

Enhanced performance using Turbo En (De) coding and implementing the same in VHDL

Used MATLAB, VHDL to simulate (de) coding and (de) modulation functions

Designed GUI Admissions software for Alpha Science Academy where I worked as a Lecturer

Wrote software for P2P communication between computers and provided specifications, tutorial and the source code to faculty and students. Also build various research equipments for departmental projects

Involved in team for development of the Undergraduate department under project "Impact". Projects involved setting up network, maintenance of research equipments and network security

Researched and developed efficient heuristics for instruction steering in complexity effective superscalar processors

Implemented Pipeline in Alpha 21264 simulator

Simulated and designed Dynamic Branch Scheduler, Branch Predictors and N-way set associative Cache

Led a 10 member team and designed and implemented 6 Bit Flash ADC with sparkle code correction encoder at 500 MS/s

Developed algorithms and code for demosaicing sub sampled Bayesian pattern images

Designed and Implemented pipelined IPv6 Router Forwarding Engine and DRAM interface with 40ns lookup time for each hop for based on algorithm developed by departmental research

Lead a team to designed AMD 2901 microprocessor in TSMC 0.35µ CMOS

Developed software for transmitting packets over twisted line for P2P communication

Developed tutorials and specifications; and imparted necessary training to faculty and the students

Developed software to calculate the value of unknown RLC value by reading frequency generated by a built oscillator board, through a serial port

Developed the testing, specifications and guidelines for undergraduate laboratory work. Provided proper packaging

Projects involved graphics programming, numerical computation for Physical computation, image compression algorithms

Participant and member of IEEE; member of Graduate Indian Students' Association; active participant in Undergraduate Student Government, participant in NC State International Office (OISSS) activities

Extra curricular activities also include tennis, cricket, and soccer, playing guitar, flute, and harmonica, reading novels and computer graphics

J. Koppanalil, P. Ramrakhyani, S. Desai, A. Vaidyanathan, and E. Rotenberg. "A Case for Dynamic Pipeline Scaling". 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'02), October 2002

A. Dutta, S. Desai, N. Pandya. "Advances in Picture Coding". Presented in National Symposium held at Watumull Institute of Electrical Engineering and Computer Technology (WIEECT), Mumbai

The other presentations include that on "Clustered Microarchitecture", "Carbon Nanotubes" and "Turbo Codes"