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M.S. in Electrical Engineering (Specialized in Computer Architecture, VLSI, ASIC and Circuit Design)
B.E. in Electronics and Communications (Specialized in Electronics, Digital Communications and DSP)
Résumé
in detail...
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A]
Academic Background:
N.C.
State University, Raleigh
M.S. Electrical Engineering, (December 2002)
GPA:
3.80/4.00
L.D.
College of Engineering, Ahmedabad
B.E. Electronics and Communications, (June 2001)
GPA:
4.00/4.00
| Relevant
Subjects: |
| Graduate |
Undergraduate |
| Digital
ASIC design |
Digital
Signal Processing |
| Microwave
Circuit Design |
Data
Communications Networking |
| Random
Processes |
Optical
Communications |
| Advanced
Micro Architecture |
Microprocessor
Interfacing & Applications |
| Analog
Circuits |
Advanced
Mathematics |
| VLSI
Systems Design |
Applied
Information Theory |
| Computer
Design and Technology |
Antenna
Design & Wave Propagation |
| Coding
& Modulation |
Power
Electronics |
| Principles
of MOS Transistor |
Engineering
Economics and Business Management |
| Digital
Communications |
Analog
Circuits & Applications |
GRE:
2090 (Q: 800, A: 730, V: 560)
TOEFL: 297/300 TWE:
6/6
B]
Paper Publications:
| 1. |
J.
Koppanalil, P. Ramrakhyani, S. Desai, A.
Vaidyanathan, and E. Rotenberg
|
"A
Case for Dynamic Pipeline
Scaling".
To appear in 2002
International Conference on
Compilers, Architecture, and
Synthesis for Embedded Systems
(CASES'02), October 2002.
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| 2. |
A.
Dutta, S. Desai, N. Pandya
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"Advances
in Picture Coding".
Presented in National
Symposium held at Watumull
Institute of Electrical
Engineering and Computer
Technology (WIEECT), Mumbai.
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| 3. |
S.
Dalal, S. Desai
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"Clustered
Micro Architecture: Study,
Implementation and Improvement
using New Steering
Heuristics".
Presented as part of research
paper in the course ECE792E
Advanced Microarchitecture
Design, Dr. E. Rotenberg.
December 2002.
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| 4. |
Q.
Li, S. Desai, S. Gowda
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"Carbon
Nanotube".
Presented as part of research
paper in the course ECE 757
Principles of MOS Transistor,
Instructor: Dr. V. Misra.
December 2002
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| 5. |
S.
Desai, K. Mehta
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"Turbo
Codes".
Presented as part of research
and simulation project in the
course ECE 715 Digital
Communications, Instructor:
Dr. A. Hallen. May 2002.
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C]
Professional Experience:
| 1. |
System
Administrator and Developer, NC State
University (Jan `03 - Current) |
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*
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Handling
the Linux server. Developing a secure
mailing list and account management in
PHP for University Graduate Students
Association (UGSA). Also looking to set
up a news mailing list and maintaining a
Bulletin Board by PhpBB.
|
| 2. |
Research
Student, NC State University. Advisor:
Dr. Rotenberg (Jan `02 - Dec `02)
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*
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Involved
in research in high performance computer
architecture at technologies of 0.1µm
and below. Studied and implemented a
variable depth pipeline for variable MHz
processors for energy savings up to 44%.
Published a paper on the obtained
results. The method was compared to
Dynamic Voltage Scaling (DVS), which
gave much less returns at variable
frequency.
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*
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The
projects were simulated in C++, and the
hardware was written as Object Oriented
classes. The newer versions were built
upon the pipeline software written by
Burger et al.
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*
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The
published paper is listed above |
| 3. |
Intern/Research
Assistant, Space Application Center
(SAC), Indian Space Research
Organization (ISRO), Ahmedabad, INDIA
(Jun `00 - May `01)
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|
*
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Simulation,
Design and Implementation of the Trellis
Codec (Convolutional Encoder and Viterbi
Decoder)
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Research
Guide: Dr. K.S. Dasgupta
(Director), Dr. P.M.
Sidharthan (Scientist Engineer
SF)
This was a group project of
two persons. Tasks included
simulation of Digital
Communication System in MATLAB.
The encoder is rate 1/2 and
1/3 convolutional encoder. The
system is modulated using BPSK/QPSK
method and tested over AWGN
and Rayleigh Channel. Both
hard and soft decision
demodulators were used and
data was decoded using Viterbi
Algorithm. The hardware was
implemented through VHDL on
chips MAX EPM7128SLC-10 and
EPM7046LC-10. The testing
decoder gave a very moderate
error rate of 10-3 to
10-4 at
SNR of 3dB.
Problems faced during the
project included setting up
clock timings and
synchronization because the
decoder was essentially
asynchronous. The problem was
fixed using clock dividers and
unique word detection
technique respectively. The
other problem was to fit the
decoder in the fixed sized
chip emphasizing on compact
and fast algorithm.
Future extensions to this
project include implementing
soft decoder in hardware,
change the synchronization
technique to self
synchronization where the
entropy in the data itself
acts to synchronize itself,
and in built a 16PSK modulator
for implanting Trellis Coded
Modulation (TCM).
The rate 1/2 decoder is
proposed to be used in GSAT-II.
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*
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Block
Turbo Encoder/Decoder - Simulation and
Implementation
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This
is an extension to the earlier
project. The codes have been
transformed into much powerful
turbo codes. This is then
turbo decoded using iterative
techniques and Log likelihood
algebra. Once again the system
was simulated in MATLAB, with
ASK modulation and decoded
(soft) using iterative
techniques. This was again
implemented through VHDL
language ALTERA MAX+PLUSII and
tested in real time.
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| 4. |
Systems
Programmer, Developer and Maintenance
(Jun `98 - May `00) |
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Designed
Admissions software for Alpha Science
Academy where I worked as Lecturer |
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The
software had GUI built in for easy
understanding and help as well as
tutorial built in for first-time users
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The
memory management was done through
efficient usage and maintenance of
linked lists |
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Also
helped in later debugging and upgrading
the software from time to time |
| 5. |
Teaching
Assistant for 'C', L. D. Engineering
College, Ahmedabad, INDIA (Jun `00 - Dec
`00)
|
| 6. |
Research
Assistant, L. D. Engineering College,
Ahmedabad, INDIA (Jan `99 - May `01)
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*
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Wrote
software for P2P communication between
computers and provided specifications,
tutorial and the source code to faculty
and students. Also build various
research equipments for departmental
projects
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*
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Involved
in team for development of the
Undergraduate department under project
"Impact". Set up network, DSL
network lines and system administration.
Helped in building and maintaining
various research equipments, and also
network security
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*
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Helped
Companies to conduct on-campus
interviews by setting up computer
network and software for written
evaluation
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| 7. |
Tutor,
Undergraduate Tutorial Center, NC State
University (Sep `01 - Dec `02)
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*
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Tutoring
in Calculus, Solid Geometry, Statistics
and Physics |
|
*
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Have
developed skills in explaining difficult
concepts to undergraduates |
|
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Involved
in Walk-In Tutoring center to solve the
problems of the students on the spot |
| 8. |
Lecturer/Tutor,
Alpha Science Academy, Ahmedabad, INDIA
(May `97 - May `01)
|
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*
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Lectured/Tutored
in Advanced Math and Physics for 4
years. Trained nearly 30 tutors,
conducted weekly exams and grading
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D]
Graduate Projects:
| 1. |
High
Performance Computer Architecture |
| |
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Exploring
the circuit performance at
nanometer regime. Currently
looking into efficient
heuristics for instruction
steering in complexity
effective superscalar
processors. The idea is to
steer a set of closely related
instructions in one unit and
reduce inter-cluster
communication. Implemented
Clustered Micro Architecture
with OOO Issue, Complexity
Effective Superscalar
Processor with FIFO based
Wakeup/Select. Implemented
Pipeline in Alpha
21264 simulator. The
implementation was done in
C/C++ under Sun OS
environment.
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| 2. |
Analog
Chip Design |
| |
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Designed
and implemented 6 Bit Flash
ADC. The ADC had
conversion rate up to 500
MS/s, with ENOB of around 5.75
and SNR of 35.5 dB. The
comparator used in the
conversion had a resolution of
10 mV. The circuit also
included sparkle code
correction encoder.
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| 3. |
Implemented
the Demosaicing process of a Sub sampled
Bayesian Image |
| |
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A
very popular "Lenna"
image was taken and sub
sampled in Bayesian pattern.
The image was then blurred
with a blur matrix
representing a digital camera.
The task was to reconstruct
the entire image as least mean
square error process. The
pattern we obtain is called
Mosaic and task was that of
Demosaicing. It was
efficiently implemented in
frequency domain using MATLAB.
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| 4. |
Designed
and Implemented IP Router Forwarding
Engine and DRAM interface for fast hop
lookup of network addresses in ASIC
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| |
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This
project implemented a fast
algorithm for fast hop lookup
from SRAM and reading the next
hop from DRAM. The Forwarding
Engine determined the next hop
address and selected the hop
from the DRAM. The storage
process used for SRAM greatly
reduced the calculation
complexity and hence increased
the speed. The bottleneck of
the design was the DRAM access
cycles.
|
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| 5. |
Designed
and Implemented 4 bit Slice
microprocessor (AMD 2901) using CMOS
Technology (November 2001, NCSU)
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| |
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This
project involved design of the
microprocessor AMD2901 and
implementation using the VLSI
technology. The entire chip
was designed using the CMOS
TSMC 0.35µ technology. The
layout was done using layout
tool of Cadence. The design
was tested for signed
multiplication and generation
of Gray Code.
|
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| 6. |
Designed
and Simulated Dynamic Branch Scheduler
using Tomasulo's Algorithm (November
2001, NCSU)
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This
project involves the
simulation of Dynamic Branch
Schedulers commonly available
in all the computers. The
algorithm used was Tomasulo's
Algorithm. The dynamic branch
scheduling (i.e. hardware
scheduling) helps in super
scalar processing of the
computer thereby increasing
its speed. The algorithm
exposes the parallelism in
instruction execution. The
design was tested on PERL and
GCC traces and were used as
the benchmark in the project.
|
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| 7. |
Designed
and Simulated Bimodal, G-Share, and
Hybrid Branch Predictor with select and
Global Branch History (October 2001,
NCSU)
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|
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This
project involves the
simulation of Branch
Predictors. The branch
predictors are very useful in
hardware of computer as they
increase the processing speed
of the computer. There are lot
of branches and loops in the
instructions and they cause
CONTROL HAZARDS. They are
taken care of by branch
predictors. The benchmarks
used in this project were GCC,
JPEG and PERL and same were
used for designing the best
predictor.
|
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| 8. |
Designed
and Simulated of N-way Set Associative
Cache for uni-processor system
(September 2001, NCSU)
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This
project involves the
simulation of N-way set
Associative caches. Caches
help a lot to simulate a
faster memory. The performance
with and without Victim Cache
is also studied and the same
is designed. The GCC, JPEG,
PERL, COMPRESSION and VORTEX
were the benchmarks used in
the project.
|
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| 9. |
Band
Structures for various Semi Conductors
using Empirical Pseudo-potential methods
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E] Undergraduate
Projects:
| 1. |
RS-232
Communications. Interfacing two PCs -
Semester VIII '2001 |
| |
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This
project was undertaken to
develop the resources of Data
Communications Network (DCN)
laboratory, EC Dept. The data
flows through two PCs through
a graphical interface.
|
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| 2. |
Interfacing
Mouse with Graphics (Home Project) |
| |
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This
project was undertaken for
hardware interfacing. The
mouse was interfaced using INT
33H in C. Programs like
cyberprobe (a game) and icon
builder were incorporated
using the header files in this
project.
|
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| 3. |
PC
Interfaced Multimeter through Serial
Port (Home Project) |
| |
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This
project was developed with a
view to study data transfer
through the serial port and
combine the knowledge of
Electronics with it. The
555-timer in astable mode
generates the appropriate
frequency, which is read, at
the port and the respective
component values are
calculated. The software is
entirely graphical.
|
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| 4. |
Admission
Software using Graphics, Database and
Object Oriented Concepts - Alpha Science
Academy Pvt. Ltd.
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This
software was developed for the
Institute where I also served
as a Tutor/Lecturer in
Mathematics and Physics. This
interactive and Graphics
Software helps in maintaining
student record.
|
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| 5. |
Horizontal
Oscillator and EHT section of B/W TV
(Team Project) - L. D. College of
Engineering, EC Dept., Semester VI
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This
project was also undertaken
with a view to increase and
develop the resources in TV
Engineering. (TVE) Lab, EC
Dept.
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| 6. |
Voltage
Shunt Feedback Amplifier - L. D. College
of Engineering, Semester IV
|
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This
project was undertaken with a
view to increase and to
develop the resources in
Analog Circuit Application (ACA)
Lab, EC Dept.
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| 7. |
Icon
Designer in C Graphics - Home Project |
|
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Designed
a program to develop icons and
mouse cursors using C graphics
library and mouse interfacing.
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| 8. |
Source
& Channel Coding Algorithms in C -
Home Project |
|
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Implemented
error correcting coding
techniques as well as
compression techniques
(Huffman, RS, convolutional,
Block Turbo, JPEG) in C and
MATLAB.
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| 9. |
Shell
based Online Shopping System |
|
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Designed
a UNIX based online shopping
system. The programming was
shell bases and provided
invoice, inventory and stock
options.
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| 10. |
Visual
Basic based Online Shopping System -
Home Project |
|
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Designed
a GUI based online shopping
for hardware component selling
company in Visual Basic.
Included various access
levels. Had invoice, price and
inventory control too.
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F]
COMPUTER SKILLS:
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Programming
Languages: C, C++, Verilog HDL, VHDL,
JAVA, Assembly (Intel & Motorola),
Visual Basic, Shell, HTML, PHP
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Computer
Networks: TCP, IP, UDP, Ethernet, Token
Ring, IPv6, Databases (MS Access, SQL,
Oracle)
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Operating
Systems: Solaris, Linux, MS
Windows-NT/95/98/2000/XP, MacOS, DOS,
eCos
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Design/Simulation
Tools: MATLAB, ORCAD, Sonnet, PSpice,
Protel, Cadence IC Design Tool
(including Synopsys, HSpice, Artist,
Layout, AWaves, Spectre), Office, CVS
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G]
Scholastic Achievements:
| 1. |
"Honor
Certificate" from IEEE |
| 2. |
"Appreciation
Certificate" and "Appreciation
Letter" from Office of
International Scholars and Students
Services (OISSS), NC State for working
as a "Small Group Leaders" for
new international students and help them
in orientation of the school
|
| 3. |
Secured
three consecutive first ranks in Gujarat
University in the terms, December 1998,
June 1999 and December 1999. Overall the
top ranker among the class of almost 60
and in university of 120
|
| 4. |
"Participation
Certificate" in All India Quiz
organized by Limca |
| 5. |
Secured
100/100 marks in Maths Subject in SSC
Exams |
| 6. |
Received
the "Distinction" Certificate
form the Late Shri Chimanbhai Patel, the
then Chief Minister of Gujarat for
outstanding performance (first rank and
95%) in 7th Standard
|
H]
Principal Extra-curricular and co-curricular
activities/achievements:
| 1. |
Active
participant, organizer and member of
various activities in IEEE, student
chapter in Gujarat comprising of four
engineering colleges. Delivered various
lecture series mentioned above. Moreover
was one of the organizers in tech-fest
organized by IEEE for two consecutive
years
|
| 2. |
"Student
Ambassador" in the 2002 Minority
Carrier Fair |
| 3. |
Member
of Maitri (Graduate Indian Students'
Association) |
| 4. |
Small
Group Leader (SG) for OISSS for NC State
University. Duties include helping out
new students with orientation and
answering their queries
|
| 5. |
Debate
Secretary (DS) in the five-member
committee of Student Government in L.D.
College of Engineering for the year May
2000 to May 2001. Main committee member
for student cultural festival; post
golden jubilee years, celebrations of
L.D. College of Engineering in April
1999(christened 'Tatva') and once again
in April 2000 (christened 'Ecstasy').
This role included planning,
co-ordination and orchestration of a
week long cultural festival, a rock
show, a talent evening as well as a
month long sports tournament. Other
duties involved were press relations,
marketing, sponsor servicing, and
general organization
|
| 6. |
Extra
curricular activities also include
sports (tennis, cricket, and soccer),
playing musical instruments (guitar,
flute, and harmonica), reading novels
and computer graphics
|
| 7. |
Part
of the music club/band called "Aalaap"
at NC State University, which consists
of mostly graduate students. Put up
numerous shows for charity in front of
NC State students as well as other
colleges
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